This application claims the priorities of Korean Patent Application No. 2003-0080143, filed on Nov. 13, 2003, No. 2004-0060691, filed on Jul. 31, 2004 and No. 2004-0071789, filed on Sep. 8, 2004, in the Korean Intellectual Property Office, the disclosures of which are incorporated herein in their entireties by reference.
1. Field of the Invention
The present invention relates to a semiconductor package and, more particularly, to a molded leadless package (MLP) having improved reliability and high thermal transferability. Further, the present invention relates to MLPs singulated by stamping/punching and by sawing, and a method of manufacturing the same.
2. Description of the Related Art
In general, semiconductor packages are packages in which semiconductor chips are mounted on and/or connected to a lead frame. As the semiconductor chip is operated, and/or a voltage of predetermined magnitude is applied to an internal element of the semiconductor chip, heat is generated by the operation of the semiconductor chip. The generation of heat is especially pronounced in the case of a power semiconductor chip to which a voltage of a relatively large magnitude is typically applied and greater quantities of heat are generated. Thus, the transferability of heat generated from a semiconductor chip inside a semiconductor package via an external board greatly affects the stability and reliability of the semiconductor package and the chip it contains.
An MLP including a lead frame pad having a side exposed to efficiently emit heat generated from a semiconductor chip to the outside environment has been widely used in various application fields. The term MLP as used herein, it should be noted, encompasses and includes a variety of leadless chip-scale molded package types, including quad flat pack no leads (QFN).
FIG. 1A is a cross-sectional view illustrating an exemplary conventional MLP disclosed in U.S. Pat. No. 5,172,214. Referring to FIG. 1A, MLP 110 has a structure in which a surface of a lead frame pad 112 to which a semiconductor 111 is attached is exposed from a surface 114 of a package body 113. Also, a portion of each of leads 115 is exposed from the other surface 116 of the package body 113. The leads 115 are electrically coupled to the semiconductor chip 111 by wires 117.
FIG. 1B is a cross-sectional view illustrating an exemplary conventional MLP disclosed in U.S. Pat. No. 6,437,429. Referring to FIG. 1B, MLP 120 includes a die 121, a package body 122, a die pad 123, and leads 124. Die 121 includes upper and lower surfaces 121a and 121b. Each of the leads 124 includes upper and lower surfaces 124a and 124b and a cut surface 124c. A portion of the lower surface 124b of each of the leads 124 is confined to form a metal pad. The metal pad is exposed to the outside of the package body 122 and formed on the same plane as the package body 122 to be electrically coupled to the outside of the MLP 120. A surface of the die pad 123 is attached to the lower surface 121b of the die 121 by an adhesive 126, and an opposite surface of the die pad 123 is exposed to the outside of the package body 122. The leads 124 are electrically coupled to the die 121 by wires 125.
In conventional MLPs having a structure as described with reference to FIGS. 1A and 1B, a surface of a lead frame pad (112 of FIG. 1A) and a surface of a die pad (123 of FIG. 1B) are exposed to the outside. Thus, heat generated from a semiconductor chip (111 of FIG. 1A) and a die (121 of FIG. 1B) can be efficiently emitted to the outside.
However, the above-described conventional MLPs have certain features that may adversely impact their reliability. In other words, because the exposed surfaces of the lead frame pad 112 and the die pad 123 are disposed on substantially the same plane as the surfaces 114a and 122a of the package bodies 113 and 122, respectively, the conventional MLPs are sensitive to thermal stress. More particularly, a high-temperature reflow process, typically involving temperatures between 240° C. and 260° C., is often used to solder the conventional MLPs to a circuit board. The exposed surfaces of the lead frame pad 112 and the die pad 123 are subjected to the high reflow process temperature, thereby subjecting to MLPs to thermal stresses that are generally proportional to the exposed areas of the lead frame pad 112 and the die pad 123. Also, it is not easy to extend the length of a hygroscopic path into the MLPs. Moreover, in the case of FIG. 1A, a step difference between the lead frame pad 112 and leads 115 is great. Thus, there is a limit to which the thickness of the lead frame pad 112 can be increased because it is not easy to bend the leads 115 when the thickness of the lead frame pad 112 is great.
Meanwhile, a semiconductor package includes a semiconductor chip or a die, a lead frame, and a package body. In the semiconductor package, the semiconductor chip is attached on a die pad of the lead frame and electrically coupled to leads of the lead frame by wires. Each of the leads includes an inner lead coupled to the wires and an outer lead serving as an outer connector of the semiconductor package. The inner leads are generally completely sealed by the package body, while the outer leads are totally exposed to the outside of the package body or the surfaces of the outer leads are partially exposed to the outside of the package body. A semiconductor package including such outer leads is called an MLP.
Also, the semiconductor package is classified into a sawing type package or a punch type package according to its manufacturing process. The sawing type package is manufactured by simultaneously molding in a block mold die a package body around a plurality of lead frames on which semiconductor chips are mounted, and cutting the package body and lead frames into individual packages using a sawing process. The punch type package is manufactured by individually molding in individual mold dies a plurality of lead frames on which semiconductor chips are mounted, and separating the lead frames using a punching method.
An example of a conventional sawing type MLP is disclosed in U.S. Pat. No. 6,437,429, entitled “Semiconductor Package with Metal Pads” invented by Chun-Jen Su et al. Also, FIGS. 15A and 15B are a cross-sectional view and a bottom view of the conventional sawing type MLP, respectively.
Referring to FIGS. 15A and 15B, a conventional sawing type MLP 1100 includes a semiconductor chip or a die 1110, a package body 1120, a die pad 1130, and leads 1140. The die 1110 has upper and lower surfaces 1110a and 1110b. The leads 1140 have upper, lower, and cut surfaces 1140a, 1140b, and 1140c, and the entire portion or a portion of each of the lower surfaces 1140b of the leads 1140 is exposed to the outside of the package body 1120 to form metal pads. The metal pads are formed on the same plane as a bottom 1120a of the package body 1120 to be electrically coupled to the outside of the conventional sawing type MLP 1100. The die 1110 is electrically coupled to the leads 1140 by wires 1150. A surface 1130a of the die pad 1130 is adhered to the lower surface 1110b of the die 1110 by an adhesive 1160.
The sawing type package has the following characteristics because of the properties of its manufacturing process. First, a surface 1130b of the die pad 1130 is exposed to the outside of the package body 1120 on generally the same plane as the bottom 1120a of the package body 1120 and the lower surfaces 1140b of the leads 1140. This is because the sawing type package is molded by attaching a cover tape to the die pad 1130 and the bottoms of the leads 1140 to prevent a resin used for molding from flowing into the lower surfaces 1140b of the leads 1140. Also, since the sawing type package is individualized into MLPs using a sawing process the sides of the package body 1120 are generally coplanar with the cut surfaces 1140c of the leads 1140.
FIG. 16 is a schematic cross-sectional view of a structure (hereinafter referred to as a system package) in which an MLP 1100 is mounted on a system circuit board 10. Referring to FIG. 16, coupling pads 12 and circuit lines 14 coupling the coupling pads 12 to each other are formed on an upper surface of the system board 10. The coupling pads 12 and circuit lines 14 are typically formed of a conductive metal, such as, for example, copper or a similar metal, and generally have the same thickness. The MLP 1100 is mounted on the system board 10 so as to join the leads 140 and the coupling pads 12 on a one-to-one basis by corresponding solder joints 16.
According to the prior art, the solder joint 16 is exposed to and may slightly move under pressure applied and heat generated during jointing of the MLP 1100 on the system board 10 by the solder joint 16. This movement may cause the solder joint 16 to flow to one side or the other, and thus the height h1 of the solder joint 16 may be difficult to control or secure. If the height h1 of the solder joint 16 is not adequately controlled above a certain minimum, such as, for example, more than 30 μm, the distance between the surface 1130b of the die pad 1130 and the circuit lines 14 of the system board 10 may be less than desired. As a result, the reliability of the MLP 1100 may be adversely affected by, for example, a die pad 1130 contacting and/or electrically shorting to a circuit line 14 of the system board 10. Further, the sensitivity of solder joint 16 to thermal and/or mechanical stress is significantly increased and the reliability of the system package may be adversely affected if the height h1 of the solder joint 16 is less than the desired minimum and/or insufficient. Moreover, the reliability of the system package may be adversely affected by the MLP 1100 tilting or collapsing such that one or more leads 1140 come into direct contact with corresponding coupling pads 12 due to movement of the solder joint 16 during mounting of the MLP 1100 on the system board 10.